uT_u is at fisrt fully solved question about clock division/multiplication in your system. You can choose any of the presented algorithms for each of the 6 channels separately, while retaining the ability to individually divide / multiply the clock on each of them.

So the algorithms:

• linear feedback shift register,
• random output w / adjustable threshold,
• euclidian trigger generator,
• burst generator,
• logic operations (AND, OR, XOR, NAND, XNOR, NOR),
• basic trigger sequencer / editor,
• DAC output (12 bit , channel # 4 only) with the following sub-algorithms: 5-bit sequencer, random output,

• LFSR / 'turing machine', logistic map, simple 16-step sequencer / arpeggiator.

  Unlike the other versions of 1UT_u this one keeps CV-inputs and does not need external expanders. With accurately implemented 1,3 inch display, it dispenses without black magic to put the module on the rails.

https://sylphmodular.top/product/1ut_u/

• 85 mA +12V
• 10 mA -12V
• 0 mA 5V
• 30 mm Depth

This Module is currently available.

Module is a 1U tile in Intellijel format